1. Field of the Invention
The present invention relates to semiconductor devices and manufacturing methods thereof and, more particularly, to a semiconductor device having a thin film transistor and a manufacturing method thereof.
2. Description of the Background Art
Conventionally, a thin film transistor with a so-called DELTA structure has been proposed as a thin film transistor. The thin film transistor with the DELTA structure is described, for example, by D. Hisamoto et al., in xe2x80x9cImpact of the Vertical SOI xe2x80x98DELTAxe2x80x99 Structure on Planar Device Technologyxe2x80x9d IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 38, No. 6, JUNE, 1991, pp. 1419-1424. Description will be made hereinafter of such thin film transistor with the DELTA structure as a conventional thin film transistor.
FIG. 48 is a perspective view schematically showing the structure of the conventional thin film transistor. Referring to FIG. 48, a monocrystalline silicon layer 203 is formed on a silicon substrate 220 with a field oxide film 221 interposed therebetween, thereby forming an SOI (Silicon On Insulator) structure. A pair of source/drain regions 203a and 203b are formed at monocrystalline silicon layer 203 so as to define a channel region. A gate electrode layer 207 is formed to face the channel region with a gate insulating film (not shown) interposed therebetween. Monocrystalline silicon layer 203 has a width W2 of approximately 0.2 xcexcm and a height H2 of approximately 0.4 xcexcm where width W2 is set smaller than height H2.
Next, description will be made of a method of manufacturing the conventional thin film transistor (FIG. 48).
FIGS. 49-52 are schematic cross-sectional views showing in order of the steps the method of manufacturing the conventional thin film transistor. Referring first to FIG. 49, a thermal oxide film (not shown) and a CVD nitride film 221 are deposited in this order on silicon substrate 220, and then CVD nitride film 221 and the thermal oxide film are patterned. Using CVD nitride film 221 and the oxide film thus patterned as a mask, silicon substrate 220 is subjected to anisotropic etching to form a silicon island 220a. Thereafter a thermal oxide film (not shown) is formed at a surface of silicon substrate 220 by thermal oxidation process. After the CVD nitride film is deposited at the entire surface, the entire surface of the silicon nitride film is etched back by anisotropic RIE (Reactive Ion Etching).
Referring to FIG. 50, a silicon nitride film 223 remains at a sidewall of silicon island 220a after etching back the entire surface. Then, silicon substrate 220 is isotropically etched using CVD nitride film 221 and sidewall nitride film 223 as a mask. Such isotropic etching removes a desired amount of the surface of substrate 220 exposed from nitride films 221 and 223. The substrate is then subjected to long-time thermal oxidation process at a high temperature of, for example, 1100xc2x0 C.
Referring to FIG. 51, through such thermal oxidation process a field oxide film 211 is formed on silicon substrate 220 and monocrystalline silicon layer 203 is formed on field oxide film 211, and then CVD nitride film 221 and sidewall nitride film 223 are removed. A sacrifice oxide layer is once formed at a surface of monocrystalline silicon layer 203 through thermal oxidation process in order to remove damage on the surface of monocrystalline layer 203, and this sacrifice oxide layer is then removed by hydrofluoric acid or the like.
Referring to FIG. 48, after a gate insulating layer is formed a gate electrode layer 207 is formed to face a region of monocrystalline silicon layer 203 to serve as a channel with the gate insulating layer interposed therebetween. Impurities are introduced using gate electrode layer 207 and the like as a mask to form source/drain regions 203a and 203b at monocrystalline silicon layer 203, thereby completing a thin film transistor with the DELTA structure.
Thus, since monocrystalline silicon layer 203 serving as a channel has width W2 smaller than height H2 and is covered with gate electrode 207 on both sides in the conventional thin film transistor, the transistor has great current drivability and its characteristics is less degraded by reduction in length of the channel. In addition, gate electrode 207 covers both side surfaces and an upper surface of monocrystalline silicon layer 203 and width W2 of a lower surface is small, so that the region serving as a channel is covered with gate electrode layer 207 for the most part. As a result, the conventional thin film transistor can also prevent electric effects imposed by external electrode interconnections. Therefore, the conventional thin film transistor is extremely advantageous for use as a transistor surrounded by many interconnections such as a load transistor forming a memory cell of an SRAM (Static Random Access Memory).
However, since monocrystalline silicon layer 203 has a small width W2, the conventional thin film transistor cannot make a contact with another conductive layer in a stable manner. This problem will be described in detail below.
FIG. 52 shows an example of the structure of the thin film transistor connected to an upper conductive layer. Referring to FIG. 52, an upper conductive layer 218 is connected to the portion of monocrystalline silicon layer 203 to serve as a source/drain region through a contact hole 217a provided in an interlayer insulating layer 217. Contact hole 217a is generally formed by etching interlayer insulating layer 217 using a resist pattern 219 formed on interlayer insulating layer 217 as a mask as shown in FIG. 53. However, a hole pattern 219a of resist pattern 219 may be shifted in the direction of X shown in the figure due to overlay displacement of the mask or the like during photolithography for forming resist pattern 219.
Since monocrystalline silicon layer 203 has width W2 as small as 0.2 xcexcm, contact hole 217a is easily shifted away from monocrystalline silicon layer 203 as shown in FIG. 54. Consequently, a contact between upper conductive layer 218 and monocrystalline silicon layer 203 cannot be made.
Furthermore, the conventional method of manufacturing a thin film transistor requires long-time thermal oxidation process at a high temperature for forming an SOI structure. If such long-time thermal oxidation process at a high temperature is carried out after other elements are formed, they may be destroyed by diffusion of impurities or the like. Therefore, such high temperature, long-time thermal oxidation process must be carried out before other elements are formed. As a result, there is another problem that this thin film transistor cannot be formed over other elements formed on silicon substrate 220.
One object of the present invention is to provide a thin film transistor that allows a contact between a source/drain region of a thin film transistor and an upper or lower conductive layer to be made stably.
Another object of the present invention is to provide a method of manufacturing a thin film transistor allowing a thin film transistor to be formed over an element formed at a substrate.
A semiconductor device having a thin film transistor according to one aspect of the present invention includes first and second conductive layers, a semiconductor layer, and a gate electrode layer. The first and second conductive layers are formed isolated from each other. The semiconductor layer has one end placed on top of the first conductive layer and in contact with the first conductive layer and the other end placed on top of the second conductive layer and in contact therewith. The gate electrode layer covers an upper surface and opposing side surfaces of the semiconductor layer, with a gate insulating layer interposed therebetween, at a central portion sandwiched by one and the other ends of the semiconductor layer. The line width defined by the opposing side surfaces of the semiconductor layer is smaller than the thickness of the semiconductor layer. The first and second conductive layers each have a line width greater than that of the semiconductor layer.
In the semiconductor device having a thin film transistor according to the aspect above, the first and second conductive layers are formed in contact with one and the other ends of the semiconductor layer, respectively, and have a width greater than that of the semiconductor layer. As a result, even if the position where the contact hole to be in contact with one and the other ends of the semiconductor layer is shifted due to overlay displacement of the mask, a contact with the first and second conductive layers can be made more stably.
In the aspect above, the gate electrode layer preferably covers a lower surface of the semiconductor layer.
In the aspect above, the gate electrode layer preferably covers the surface of the semiconductor layer from the upper end to the lower end thereof at the central portion of the semiconductor layer.
In the two preferable aspects above, a thin film transistor with excellent gate electrode controllability can be obtained.
In the aspect above, preferably, nitrogen is introduced at least to a portion of the semiconductor layer covered with the gate electrode, and one kind of impurity selected from the group consisting of fluorine, oxygen and neon is introduced at least to the gate insulating layer and the portion of the semiconductor layer covered with the gate electrode.
As a result, a current flowing between the drain and the source when the thin film transistor is off (this current will be hereinafter referred to as an off-current) can be reduced while maintaining a threshold voltage of the thin film transistor at an appropriate value.
In the aspect above, the gate insulating film preferably includes silicon oxynitride (SiOxN1xe2x88x92x). Consequently, an off-current can be reduced and increase in threshold voltage of the thin film transistor can be prevented.
In the aspect above, preferably nitrogen is introduced to the gate insulating film and to the surface of the gate electrode layer facing the semiconductor layer.
Consequently, an off-current can be reduced and increase in threshold voltage of the thin film transistor can be prevented.
In the aspect above, preferably impurities of the conductivity types different from each other are introduced to the first and second conductive layers and the gate electrode layer, and the concentration of the impurity introduced to the gate electrode layer is 4.23xc3x971019 cmxe2x88x923 or lower.
Consequently, a current flowing between the drain and the source when the thin film transistor is on (this current will be hereinafter referred to as a on-current) can be increased while an off-current is decreased.
In the aspect above, preferably the semiconductor layer and the first and second conductive layers include impurities of the same conductivity type, and the impurities introduced to one and the other ends have concentration lower than that of the impurities introduced to the first and second conductive layers.
Consequently, one and the other ends of the semiconductor layer can be formed as regions with relatively low impurity concentration and the first and second conductive layers as regions with relatively high impurity concentration, thereby implementing a so-called LDD (Lightly Doped Drain) structure and relaxing the drain electric field.
A semiconductor device having a thin film transistor according to another aspect of the present invention includes a semiconductor layer and a gate electrode layer. The semiconductor layer has a pair of source/drain regions spaced apart from each other to define a channel region. The gate electrode layer faces the channel region of the semiconductor layer with a gate insulating layer interposed therebetween. Nitrogen is introduced to the channel region and one kind of impurity selected from the group consisting of fluorine, oxygen and neon is introduced to the channel region and the gate insulating layer.
Introduction of nitrogen contributes to inactivation of crystal defect which is present in a high electric field region of the contact portion between the drain and the channel (this portion will be hereinafter referred to as a drain end), thereby reducing an off-current of the thin film transistor. Negative fixed charges are formed by introduction of fluorine or the like to the gate insulating layer, thereby canceling change in threshold voltage in the negative direction due to donor effect of nitrogen. As a result, an off-current can be reduced while maintaining the threshold voltage of the thin film transistor at an appropriate value.
A semiconductor device having a thin film transistor according to still another aspect of the present invention includes a semiconductor layer and a gate electrode layer. The semiconductor layer has a pair of source/drain regions spaced apart from each other to define a channel region. The gate electrode layer faces the channel region of the semiconductor layer with a gate insulating layer interposed therebetween. Nitrogen is introduced to the gate insulating layer and the surface of the gate electrode layer facing the channel region.
Consequently, oxidation of the surface of the gate electrode layer facing the gate insulating layer can be prevented, an off-current of the thin film transistor can be reduced, and increase in threshold voltage can also be prevented.
A semiconductor device having a thin film transistor according to a further aspect of the present invention includes a semiconductor layer and a gate electrode layer. The semiconductor layer has a pair of source/drain regions spaced apart from each other to define a channel region. The gate electrode layer faces the channel region of the semiconductor layer with a gate insulating layer interposed therebetween. The source/drain regions of the semiconductor layer and the gate electrode layer have impurities of the same conductivity type introduced thereto. The impurity introduced to the gate electrode layer has a concentration of 4.23xc3x971019 cmxe2x88x923 or lower.
Consequently, a high on-current can be obtained because the gate capacitance is determined only by the capacitance of the gate insulating layer when the thin film transistor is on. In addition, a low off-current can be obtained because a depletion layer is produced at the surface of the gate electrode layer facing the channel to reduce the gate capacitance when the transistor is off.
A method of manufacturing a semiconductor device having a thin film transistor according to one aspect of the present invention includes the following steps.
First and second conductive layers are formed by vapor deposition to be isolated from each other. A layer formed by vapor deposition is etched to form a semiconductor layer having one end placed on top of the first conductive layer and in contact with the first conductive layer and the other end placed on top of and in contact with the second conductive layer. At a central portion sandwiched by one and the other ends of the semiconductor layer, a gate electrode layer is formed by vapor deposition which covers an upper surface and opposing side surfaces of the semiconductor layer with a gate insulating layer interposed therebetween. The first and second conductive layers and the semiconductor layer are formed so that the line width defined by the opposing side surfaces of the semiconductor layer is smaller than the thickness of the semiconductor layer and the line width of the first and second conductive layers is greater than that of the semiconductor layer.
In the method of manufacturing a semiconductor device having a thin film transistor according to the one aspect of the present invention, respective portions forming the thin film transistor are formed by vapor deposition method. This eliminates the need for the high temperature, long time thermal processing for fabricating an SOI structure in contrast to the conventional art, so that this thin film transistor can be formed over an element at the substrate. As a result, a thin film transistor more suitable for high integration can be obtained.
A method of manufacturing a semiconductor device having a thin film transistor according to another aspect of the present invention includes the following steps.
First, a semiconductor layer is formed. Photoresist is applied to cover the semiconductor layer. The photoresist is exposed to the light transmitted through a reticle with a pattern for patterning the semiconductor layer so that the semiconductor layer has a pair of regions to serve as source/drain regions to define a channel region thereby to demagnify the pattern by n, and the photoresist is developed to form a resist pattern. There is a space equal to the minimum exposure size x n between the region to serve as a drain region and the channel region of the pattern. The semiconductor layer is etched using the resist pattern as a mask, thereby patterning the semiconductor layer so that the layer has a pair of regions to serve as source/drain regions to define the channel region and the line width at the junction portion between the channel region and the region to serve as a drain region is smaller than the line width of the remaining portions. Impurities are introduced to the pair of regions to serve as source/drain regions of the semiconductor layer to form a pair of source/drain regions. The gate electrode layer is formed to face the channel region with a gate insulating layer interposed therebetween.
According to the method of manufacturing a semiconductor device having a thin film transistor according to the above-mentioned another aspect of the present invention, a thin film transistor having a low off-current can be easily manufactured.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.